Proceedings of the IEEK Conference (대한전자공학회:학술대회논문집)
- 1998.10a
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- Pages.751-754
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- 1998
Design of an On-Chip Multiprocessor
단일 칩 다중프로세서의 설계
Abstract
This research aims at developing a single chip multiprocessor for high-performance computer system. Our design approach is to design a relatively small and simple processor unit and to integrate multiple copies of the unit in an efficient way. The proposed multiprocessor is composed of four CPUs and one graphic coprocessor. The four CPUs share the graphic coprocessor and each CPU implements the 64-bit SPARC-V9 instruction set architecture. This paper gives an overview of the proposed microarchitecture and discusses the considerations made in the course of the design.
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