Design of an On-Chip Multiprocessor

단일 칩 다중프로세서의 설계

  • 이상원 (고려대학교 전자공학과 ASIC 연구실) ;
  • 김영우 (고려대학교 전자공학과 ASIC 연구실 고려대학교 정보공학과 병렬연산연구실 한국전자통신연구원 컴퓨터시스템연구부)
  • Published : 1998.10.01

Abstract

This research aims at developing a single chip multiprocessor for high-performance computer system. Our design approach is to design a relatively small and simple processor unit and to integrate multiple copies of the unit in an efficient way. The proposed multiprocessor is composed of four CPUs and one graphic coprocessor. The four CPUs share the graphic coprocessor and each CPU implements the 64-bit SPARC-V9 instruction set architecture. This paper gives an overview of the proposed microarchitecture and discusses the considerations made in the course of the design.

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