Fault-Tolerant Analysis of Redundancy Techniques in VLSI Design Environment

  • Cho Jai-Rip (Dept. of Industrial Engineering, Kyung-Hee University)
  • 발행 : 1998.11.01

초록

The advent of very large scale integration(VLSI) has had a tremendous impact on the design of fault-tolerant circuits and systems. The increasing density, decreasing power consumption, and decreasing costs of integrated circuits, due in part to VLSI, have made it possible and practical to implement the redundancy approaches used in fault-tolerant computing. The purpose of this paper is to study the many aspects of designing fault-tolerant systems in a VLSI environment. First, we expound upon the opportunities and problemes presented by VLSI technology. Second, we consider in detail the importance of design mistakes, common-mode failures, and transient faults in VLSI. Finally, we examine the techniques available to implement redundancy using VLSI and the problems associated with these techniques.

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