Proceedings of the KIEE Conference (대한전기학회:학술대회논문집)

The Korean Institute of Electrical Engineers (대한전기학회)
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A Study on the Design of Concatenated Viterbi Decoder

연접형 비터비 복호기 설계에 관한 연구

  • Kim, Dong-Won (Dept. of Electronic Engineering, University of Seoul) ;
  • Jeong, Sang-Guk (Dept. of Electronic Engineering, University of Seoul) ;
  • Kim, Young-Ho (Dept. of Electronic Engineering, University of Seoul) ;
  • Rho, Seung-Yong (Dept. of Electronic Engineering, University of Seoul)
  • 김동원 (서울시립대학교 전자공학과) ;
  • 정상국 (서울시립대학교 전자공학과) ;
  • 김영호 (서울시립대학교 전자공학과) ;
  • 노승용 (서울시립대학교 전자공학과)
  • Published : 1998.07.20
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Abstract

In this paper, we proposed the method to improve the performance of Viterbi decoder by applying Concatenated structure. Proposed decoder for Concatenated Code is designed with inner Viterbi decoder, block deinterleaver and outer Viterbi decoder. Inner Viterbi decoder (K=7, R=1/2) has 8-level soft decision, but outer decoder (K=7, R= 1/2) has 2-level hard decision. Applied interleaving scheme make decoder to have better BER performance in Concatenated code. The designed VLSI shares inner decoder with outer decoder. Because of sharing structure, complexity of decoder can be reduced to half. But it required about twice clock speed.

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