Proceedings of the Korea Society for Industrial Systems Conference (한국산업정보학회:학술대회논문집)
- 1997.11a
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- Pages.137-146
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- 1997
Error Correcting Technique with the Use of a Parity Check Bit
패리티 검사비트를 이용한 새로운 오류정정 기술
Abstract
The simplest bit error detection scheme is to append a parity bit to the end of a bit sequence. In this paper an error correction technique with the use of a parity bit is proposed, and the performance of the proposed system is analyzed. The error probability of the proposed system is compared with the output of computer simulation of the proposed system. It is also compared with the error probability of error at BPSK system, and the signal-to-noise ratio gain is showed.
Keywords