Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference (한국전기전자재료학회:학술대회논문집)
- 1994.11a
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- Pages.54-58
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- 1994
The process optimization of in-situ H$_2$ bake and GeH$_4$ clean in low temperature Si epitaxy using design of experiment
저온 Si계 에피 성장기술에서 실험계획법에 의한 in-situ H$_2$ bake 및 GeH$_4$ clean 공정 최적화
Abstract
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