Proceedings of the KIEE Conference (대한전기학회:학술대회논문집)
- 1994.07b
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- Pages.1460-1462
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- 1994
A Study on the Computer Modelling with Process Parameters for the Optimization of BiCMOS Device
Process Parameter의 Modelling에 의한 BiCMOS 소자 설계의 최적화 방안에 관한 연구
- Kang, Ey-Goo (Dept. of Electrical Eng. Korea Uni.) ;
- Kim, Tae-Ik (Dept. of Electrical Eng. Korea Uni.) ;
- Woo, Young-Shin (Dept. of Electrical Eng. Korea Uni.) ;
- Lee, Kye-Hun (Dept. of Electrical Eng. Korea Uni.) ;
- Sung, Man-Young (Dept. of Electrical Eng. Korea Uni.) ;
- Lee, Cheol-Jin (Dept of Electrical Eng. Kun San Uni.)
- 강이구 (고려대학교 전기공학과) ;
- 김태익 (고려대학교 전기공학과) ;
- 우영신 (고려대학교 전기공학과) ;
- 이계훈 (고려대학교 전기공학과) ;
- 성만영 (고려대학교 전기공학과) ;
- 이철진 (군산대학교 전기공학과)
- Published : 1994.07.21
Abstract
BiCMOS is the newly developed technology that integrates both CMOS and bipolar structures on the same integrated circuit. Improved performance can be obtained from combining the advantages of high density and low power in CMOS with the speed and current capibility advantages by bipolar. However, the major drawbacks to BiCMOS are high cost, long fabrication time and difficulty of merging CMOS with bipolar without degrading of device Performance because CMOS and bipolar share same process step. In this paper, N-Well CMOS oriented BiCMOS process and optimization of device performance are studied when N-Well links CMOS with bipolar process step by 2D process and 3D Device simulation. From the simulation, Constriction of linking process step has been understood and provided to give the method of choosing BiCMOS for various analog design request.
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