Proceedings of the KIEE Conference (대한전기학회:학술대회논문집)
- 1993.11a
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- Pages.192-194
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- 1993
Design and Fabrication of a Silicon Piezoresistive Accelerometer using SOI Structure
SOI 구조를 이용한 실리콘 압저항 가속도계의 설계 및 제작
- Yang, Eui-Hyeok (Dept. of Control and Instrumentation Engr. Ajou University) ;
- Yang, Sang-Sik (Dept. of Control and Instrumentation Engr. Ajou University) ;
- Han, Sang-Woo (Dept. of Control and Instrumentation Engr. Ajou University)
- Published : 1993.11.26
Abstract
In this paper, a silicon piezoresistive accelerometer of which the cantilevers have uniform thickness is designed and fabricated with SOI wafer. The accelerometer consists of a seismic mass and four cantilevers, and is fabricated mainly by the anisotropic etching method using EPW etchant. The fabrication processes are that of the frontside processes including the etching of the cantilevers and the doubleside alignment holes, the diffusion of the piezoresisters and patterning of the contact windows, and the metal connection process, and that of the backside processes including the etching of the shallow cavity and the seismic mass. Because of the uniformity of thickness, the performance of the accelerometer fabricated with SOI wafer is expected to be better than that of accelerometer fabricated by the time-controlled etching method.
Keywords