제어로봇시스템학회:학술대회논문집
- 제어로봇시스템학회 1993년도 한국자동제어학술회의논문집(국내학술편); Seoul National University, Seoul; 20-22 Oct. 1993
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- Pages.1012-1017
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- 1993
PLC용 RISC 프로세서의 구조와 명령어에 관한 연구
A study on the architecture and instruction of a RISC processor for programmable logic controller
초록
In this paper, the instruction set and the architecture of a RISC processor for programmable logic controller is suggested. From the measurement of existing programs, the characteristics of ladder instructions are analyzed. The instruction set is defined so that the existing ladder program can be reused with simple translation. Because bit instructions controls the behavior of word instructions, the processor suits for high level language like SFC. Simulations show that the PLC with the suggested processor is twenty times faster than the PLC with the multi-purpose microprocessor.
키워드