Proceedings of the KIEE Conference (대한전기학회:학술대회논문집)

The Korean Institute of Electrical Engineers (대한전기학회)
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Step Coverage of Laser CVD Deposited $SiO_2$ Films

Laser CVD $SiO_2$ 막의 Step Coverage에 관한 연구

  • Park, J.W. (Dept. of Electrical Eng., Korea Univ.) ;
  • Kim, S.W. (Dept. of Electrical Eng., Korea Univ.) ;
  • Chun, Y.I. (Dept. of Electrical Eng., Korea Univ.) ;
  • Park, J.S. (Dept. of Electrical Eng., Korea Univ.) ;
  • Kang, H.B. (Dept. of Electrical Eng., Korea Univ.) ;
  • Sung, Y.K. (Dept. of Electrical Eng., Korea Univ.)
  • 박종욱 (고려대학교 전기공학과) ;
  • 김상욱 (고려대학교 전기공학과) ;
  • 천영일 (고려대학교 전기공학과) ;
  • 박지순 (고려대학교 전기공학과) ;
  • 강희복 (고려대학교 전기공학과) ;
  • 성영권 (고려대학교 전기공학과)
  • Published : 1991.07.18
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Abstract

This paper describe a Laser CVD technology which realizes planarized interlevel dielectrics in sub-micron VLSI's. This technology comprises sub-micron gap filling with $SiO_2$ films between metal lines. Laser CVD process conditions have been investigated to improve step coverage of interlevel dielectrics. An ArF(193nm) Excimer Laser was used to excite and dissociate gas phase $SiH_4\;and\;N_2O$ molecules. The Laser CVD by $N_2O\;and \;SiH_4$. mixture gases has realized conformal deposition above the temperature of $300^{\circ}C$, as a result sub-micron gaps were buried with $SiO_2$ films.

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