전력용 반도체 소자의 설계 제작에 있어서 Fixed oxide charge가 p+/n 접합의 항복전압에 미치는 영향

The Effect of Fixed Oxide Charge on Breakdown Voltage of p+/n Junction in the Power Semiconductor Devices

  • 이철환 (단국대학교 전기공학과) ;
  • 성만영 (단국대학교 전기공학과) ;
  • 최연익 (아주대학교 전자공학과) ;
  • 김충기 (한국과학기술원 전기 및 전자공학과) ;
  • 서강덕 (한국과학기술원 전기 및 전자공학과)
  • Yi, C.W. (Dep. of Electric Eng., Dan Hook Univ.) ;
  • Sung, M.Y. (Dep. of Electric Eng., Dan Hook Univ.) ;
  • Choi, Y.I. (Dep. of Electron Eng., Ajou Univ.) ;
  • Kim, C.K. (Dep. of Electric Eng., KAIST) ;
  • Suh, K.D. (Dep. of Electric Eng., KAIST)
  • 발행 : 1988.11.25

초록

The fabrication of devices using plans technology could lend to n serious degradation in the breakdown voltage as a result of high electric field at the edges. An elegant approach to reducing the electric field at the edge is by using field limiting ring. The presence of surface charge has n strong influrence on the depletion layer spreading at the surface region because this charge complements the charge due to the ionized acceptors inside the depletion layer. Surface charge of either polarity can lower the breakdown voltage because it affects the distribution of electric field st the edges. In this paper we discuss the influrences of fixed oxide charge on the breakdown voltage of the p+/n junction with field limiting ring(or without field limiting ring).

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