Design of a hardware system for ECG feature extraction

ECG 특징추출을 위한 하드웨어시스템의 설계

This paper describes the design of a hardware system for ECG feature extraction based on pipeline processor consisting of three computers. ECG data is acquisited by 12 bit A/D converter with hardware QRS triggred detector. Four diagnostic parameters-heart, axis, and ST axis, and ST segment are used for the classification and the diagnosis of arrhythmia. The functions of the main CPU were distributed and processed with three microcomputers. Therefore the effective data process and the real time process using microcomputer can be obtained. The interconnection structure consisting of two common memory units is designed to decrease the delay time caused by data transfer between processors and designed by which the delay time can be taken 1% of one clock period.