An architecture and its performance evaluation of a multiprocessor based programmable controller(MBPC)

  • Kim, Jong-Il (Department of Control and Instrumentation Eng., Seoul National University) ;
  • Kwon, Wook-Hyun (Department of Control and Instrumentation Eng., Seoul National University) ;
  • Park, Hong-Sung (Department of Control and Instrumentation Eng., Seoul National University)
  • Published : 1987.10.01

Abstract

INFOBUS, which has been designed as a system bus of a multiprocessor system, will be introduced. And the concepts of the multiple transfer and ORed write transfer will be described. These concepts make INFOBUS to be well suited for use as the system bus of the multiprocessor based programmable controller(MBPC). In addition, the mean data transfer time through INFOBUS, which is one of the most significant performance of a bus, will be obtained by analysis and simulation. Next, MBPC which uses INFOBUS as its system bus will be introduced, and some basic characteristics of MBPC will be described. The construction of exact model for MBPC will be given and simulated using SDL/SIM package. The reference system of our model will be briefly described also. Some results from the simulation will be given and validated.

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