Proceedings of the KIEE Conference (대한전기학회:학술대회논문집)

The Korean Institute of Electrical Engineers (대한전기학회)
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Implementation of DCT using Bit Slice Signal Processor

BIT SLICE SIGNAL PROCESSOR를 이용한 DCT의 구현

  • 김동록 (서울대학교 의과대학 의공학교실) ;
  • 고석빈 (서울대학교 공과대학 제어게측공학과) ;
  • 백승권 (서울대학교 공과대학 제어게측공학과) ;
  • 이태수 (서울대학교 공과대학 제어게측공학과) ;
  • 민병구 (서울대학교 의과대학 의공학교실)
  • Published : 1987.07.03
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Abstract

A microprogrammable Bit Slice Sinal Processor for image processing is implemented. Processing speed is increased by the parallelism in horizontal microprogram using 120bits microcode, pipelined architecture, 2 bank memory switching that interfaces with the Host through DMA, a variable clock control, overflow checking H/W,look-up table method and cache memory. With this processor, a DCT algorithm which uses 2-D FFT is performed. The execution time for $512{\times}512{\times}8$ image is 12 sec when 16 bit operation is runned, and the recovered image has acceptable quality with MSE 0.276%.

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